提出了采用LVDS高速串行数据总线技术的有源相控阵雷达DBF处理器方案。同一般的并行数据总线相比 ,既确保了高的数据传输速率 ,又降低了互连总线的复杂度和系统成本。将高速电路设计的理论运用于LVDS高速串行数据总线电路的设计 ,完成了差分PCB线传输和双绞线传输两种连接方式的LVDS总线试验电路 ,并探索了LVDS高速串行数据总线的性能。实测结果表明 ,在双绞线传输方式时试验电路在 2m长的传输距离上最高可传输 1.2 8Gbps的数字信号。

LVDS is a low swing, differential signaling technology which allows single channel data transmission at hundreds or thousands of Megabits per second (Mbps). In this paper, a scheme of a digital beam forming processor for phased array radar using LVDS is proposed. Two types of LVDS circuits using microstrip and twisted pair of lines are designed and implemented. Some high speed circuit design rules are successfully applied during printed-circuit board design stage. The performances of the designed circuits are measured and some useful results are achieved.

TN957