边界扫描技术是标准化的可测试性设计技术，它提供了埘电路板上器件的功能、互连及相互问影响进行测试的一类方法，极大地方便了对于复杂电路的测试。文中针对某设备分机具体的待测电路，遵循IEEE1149.1标准，结合FPGA芯片的BSDL文件进行边界扫描测试设计，理解和掌握其设计原理、数据结构，并实现板级测试与ATE的接口。

Boundary-scan test technology is a standard measurability design technology, and it provides method to carry out the measurement of device function, interconnection and influence to each other, and is more convenient for the measurement of complex circuits. This paper is for the study of real circuit under test of certain equipment subsystem. IEEE1149.1 standard is followed, and boundary-scan test design is carried out with integration to the BSDL document of FPGA chip, its design principle, data structure understood and grasped, and board level test interface to the ATE is realized.

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