通过分析数字直接合成技术(DDS)和锁相环技术(PLL)的各自性能特点,介绍了一种采用DDS输出的低频段线性调频信号作为PLL激励源的方案来产生高频段线性调频信号,并指出了设计中需要注意的事项。在该系统中采用AD I公司新推出的芯片ADF4360-7芯片设计锁相环路,ADF4360系列芯片内部集成了VCO,这是ADF4360的一大新的特点。通过该系统实现的宽带雷达信号作为UHF雷达的信号源,其输出频率范围为590.769 MHz~609.231 MHz。

In this paper,the configuration of ADF4360-7 and the high performance of PLL chip are briefly introduced;The system is designed for the local oscillator of wideband radar.The hardware block diagram is presented to explain the work of the scheme,and the control flow to generate the chirp signal is described in detail.Finally the diagrams of output of the single frequency generated by the lower single frequency and the chirp signal generated by the reference frequency source produced by the chip AD9854 are given at the end.The diagrams of phase noise and some other analyses of the chip are also given.

TN957.51

国家863计划资助项目(2001AA631050)