高速高精度模数转换器是现代数字通信系统中必不可少的器件。文中针对多通道数字通信系统,设计了一种单片集成的四通道16 位120 MS/ s 流水线模数转换器,内部集成基准源、时钟输入缓冲器和独立的四路转换核心,通过版图的合理布局,能够确保四路模数转换的一致性以及良好的通道间的隔离度。该电路通过0. 18 μm CMOS 工艺流片并测试验证,在120 MHz 转换速度条件下,能够获得超过75 dB 的信纳比,以及90 dBc 以上的无杂散动态范围,通道间隔离度超过90 dB,整体功耗约1. 3 W。

The high-speed and high-resolution analog-to-digital converter is necessary for modern communication system. This paper gives a design of 4-channel 16 bit 120 MS/ s pipelined analog-to-digital converter for multi-channel digital communication system. The reference, clock input buffer and 4 independent converting core are all integrated on one chip. The coherence and isolation are guaranteed by the cautious layout design. The chip is realized at 0. 18 μm CMOS progress. The test results show that the SIAND and Spurious Free Dynamic range (SFDR) could reach 75dB and 90 dBc respectively. The isolation exceeds 90 dB while the 4-chnannel ADCs chip total power is 1. 3 W.

TN972