介绍了大功率射频硅-垂直双扩散金属氧化物场效应晶体管(Si-VDMOS)的研制结果,采用栅分离降低反馈电容技术、多子胞降低源极电感技术等,从芯片原理着手,比较分析两种芯片结构设计对反馈电容的影响,以及两种布局引线对源极电感的影响,并研制出了百瓦级以上大功率射频Si-VDMOS 功率晶体管系列产品。产品主要性能如下:在工作电压28 V 及连续波下,采用8 胞合成时,225 MHz 输出功率达200 W 以上,500 MHz 输出功率达150 W 以上;进一步增加子胞数量,采用12 胞合成时,225 MHz 输出功率达300 W 以上,同时具备良好的增益及效率特性,与国外大功率射频Si-VDMOS 功率晶体管的产品参数相比,达到了同类产品水平。

The development results of high power RF Si vertical diffusion metal-oxide-semiconductor(Si-VDMOS) transistors are introduced, using split gate technology to reduce feedback capacitance and multi-cell technology to reduce source inductance. From the chip principle, the influence of two chips structure design on feedback capacitance and the influence of two layout leads on source inductance are compared and analyzed. A series of high-power RF Si-VDMOS power transistors with a power rating of over 100 W have been developed. The main performances of the product are as follows: under working voltage of 28 V and continuous wave, when using 8 chips, the output power can reach over 200 W at 225 MHz, and the output power can reach over 150 W at 500 MHz; further increasing the number of chips, when using 12 chips, the output power can reach over 300 W at 225 MHz, while possessing high power gain and high efficiency. Compared with the parameters of foreign products, these high power RF Si-VDMOS transistors have reached the same level of similar products.

TN385;TN386.1